Driven by a demand for a consumer electronic product, an electronic product, such as a smartphone or a tablet computer, is becoming thinner and smaller with lower costs. Therefore, a higher requirement is imposed on a semiconductor process and a chip, and one packaged chip is required to load more integrated circuits. Based on industrial and commercial manufacturers' requirements, integrated circuits applied to the packaged chip are mounted in a wide variety of base chips (for example, dies). As the process develops, based on a higher functional requirement, a packaging manner in which two or more dies are packaged together attracts more attention in the industry. At present, a 2.5D fan-out package (FOP) is used for a high-end product. The 2.5D FOP means that a fan-out redistribution layer (RDL) implements high-density interconnection to connect dies that have different functions and sizes.
As a new advanced packaging method introduced in recent years, an FOP initially allows batch manufacturing by combining a wafer-level packaging and manufacturing technology and a conventional packaging advantage of a single die in order to significantly reduce packaging costs for an electronic product. A typical FOP process is as follows. First, mount a die on a wafer carrier, debond the wafer carrier after plastic packaging, then manufacture an RDL and perform bumping, and finally perform die sawing, a reliability test, and product assembly.
Multiple dies packaged in one packaged chip do not independently operate, and data exchange and signal transmission requirements exist between different dies. In a 2.5D FOP structure, to implement signal transmission between two adjacent dies, an interconnection distribution layer between the two dies needs to span a molding compound fan-out area between the two dies. At present, a part that is of the interconnection distribution layer design and that spans the two dies is a shortest straight line design. Referring to FIG. 3. FIG. 3 is a top view of die pin interconnection using a metal interconnection module. However, in a 2.5D FOP process, packaging materials, such as a plastic packaging material, a chip, and a carrier, that have different coefficients of thermal expansion are used. If coefficients of thermal expansion do not match between the used materials, stress generated by temperature cycling cannot be extended, and the interconnection distribution layer between the two adjacent dies may bend for several millimeters or tens of millimeters and may even break. Consequently, reliability of transmission between the two adjacent dies is affected.